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IEEE-754 32-bit Single Precision Floating Point Representation

IEEE 754 format for the representation of 32 bit single-precision floating-point numbers
IEEE 754 format for the representation of 32 bit single-precision floating-point numbers

In an ARM Cortex, M4F processor-based microcontroller such as STM32L476vg; the floating-point number is stored in accordance to the IEEE-754.

In the above video, I have written a small code using IAR workbench. When I debugged the program using IAR. I have observed that the floating-point number is converted by the compiler into IEEE 754 format and it is being stored in S# registers of the STM32L476vg. Which are the register present in the FPU(Floating Point Unit) or VFP(Vectored Floating Point) unit.

If you want to go into details, here is the abstract

Abstract: This standard specifies interchange and arithmetic formats and methods for binary and decimal floating-point arithmetic in computer programming environments. This standard specifies exception conditions and their default handling. An implementation of a floating-point system conforming to this standard may be realized entirely in software, entirely in hardware, or in any combination of software and hardware. For operations specified in the normative part of this standard, numerical results and exceptions are uniquely determined by the values of the input data, sequence of operations, and destination formats, all under user control.

“IEEE Standard for Floating-Point Arithmetic,” in IEEE Std 754-2008 , vol., no., pp.1-70, 29 Aug. 2008, doi: 10.1109/IEEESTD.2008.4610935.

A great tool to have is the online IEEE 754 convertor

https://www.h-schmidt.net/FloatConverter/IEEE754.html

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STM32L476vg ARM Cortex M4F Architecture

It uses ARM v7E-M architecture.

It a Harvard based architecture with two distinct buses for data and memory.

It has all the instruction set of M0, M1 and M3 .

It also has an additional feature set to support Floating-point Arithmetic. IEEE754 standard in single precision and double precision.

The following points are from the programming model.

There are three modes of operations:

  1. Thumb State
    1. Thread mode: Privileged
    2. Thread mode: Unprivileged
  2. Debug mode

Two thread mode are given to support a operating system. Kernel software run in priviledged mode and the user application software runs in unprivledged mode.

Unprivileged mode has some restriction on memory access.

Privileged mode has full access to system resources.

If an operating system is running and a user application needs to access the Privileged resources it has to generate an exception/interrupt and then the interrupt will be taken by the handler and put the system in privilege mode.

You can switch from privilege mode to unprivileged mode by setting nPRIV and SPSEL bit in the CONTROL register.

Just like all the other processors ARM Cotex M4 has registers and pointer registers.

The major difference is the use of two different stack pointer registers.

  1. Main Stack Pointer (MSP)
  2. Process Stack Pointer (PSP)

If application is running in privileged mode than main stack pointer will be used. And if the application is working in unprivileged the process stack pointer will be used.

General Purpose Registers:

R0 – R12 – General Purpose Register

R13 – Stack Pointer (SP) {MSP and PSP}

R14 – Link Register (LR)

R15 – program counter (PC)

Special registers:

  • xPSR – {APSR, EPSR, IPSR}
  • FAULTMASK
  • BASEPERI
  • PRIMASK
  • CONTROL
floating point registers of arm cortex m4f

There are 32 FPU registers from s0 to s31.

They group together to form a single 64-bit register. which are from D0 to D15

There is a Floating Point Status and Control Register (FPSCR).